Better encapsulation and considerably reduce stepper jitter

Disabling an ISR on ARM has 3 instructions of latency. A Memory barrier is REQUIRED to ensure proper and predictable disabling. Memory barriers are expensive, so avoid disabling if already disabled (See https://mcuoneclipse.com/2015/10/16/nvic-disabling-interrupts-on-arm-cortex-m-and-the-need-for-a-memory-barrier-instruction/)

Co-Authored-By: ejtagle <ejtagle@hotmail.com>

Co-Authored-By: ejtagle <ejtagle@hotmail.com>

Alternative to the apparently superfluous double delay

Followup to #10656

[2.0.x] Fix switching extruder

`DONT_SWITCH` got lost along the way. Replace it with `DO_SWITCH_EXTRUDER` and adjust the code.

[2.0.x] Add FAN_MAX_PWM

[2.0.x] Prevent compilation of unused u8g-oriented code

Fix #10699

Fix #10708

As pointed out in #10731

[2.0.x] Smarter MIN, MAX, ABS macros